1. Field of the Invention
The present invention relates to a memory device, and more particularly, to a phase change memory device.
2. Description of the Related Art
In general, memory devices are classified into volatile and non-volatile memory devices. Volatile memory devices lose stored information when the power is cut off. In contrast, nonvolatile memory devices do not lose stored information when the power is cut off. Dynamic random access memory (DRAM) is an example of one type of volatile memory devices. Volatile memory devices require a refresh operation to be performed during operation. The refresh operation is performed to restore stored information, which is lost due to generation of a leakage current of a memory device, after intervals separated by a predetermined period of time. Thus the disadvantage of volatile memory devices is the large consumption power.
When volatile memory devices can be replaced with nonvolatile memory devices, reduction in consumption power is expected and thus a few types of nonvolatile memory devices are being used or researched. Most of the nonvolatile memory devices currently being used are flash memory devices. However, flash memory devices have low operation speeds, require relatively high voltages, and have a characteristic such that they are not reliable during re-writing operations, thus are used exclusively in mobile appliances such as digital cameras or mobile phones.
A phase change memory (PRAM) has been strongly suggested as the next-generation of nonvolatile memory device to replace flash memory devices. A phase change memory device uses a phase change layer, the resistivity of which changes according to the crystalline state. The phase change memory device stores information by controlling the crystalline state of the phase change layer by applying electric joule heat due to a current or a voltage to the phase change layer under appropriate conditions. The phase change memory device performs a set operation by changing the phase change layer from an amorphous state having a high resistance to a crystalline state having a low resistance (on-state, logical value of “0”), and performs a reset operation by changing the phase change layer from the crystalline state having a low resistance to the amorphous state having a high resistance (off-state, logical value “1”). The information stored in the phase change memory can be read by measuring the change in the resistance value due to the crystalline state of the phase change layer.
However, the phase change memory device needs to satisfy following conditions to be selected as a next-generation nonvolatile memory device.
First, the phase change memory device currently requires relatively large consumption power since the phase change memory device is driven by controlling the crystalline state of the phase change material using the electric joule heat which is generated when a current or a voltage is applied to the phase change layer. Thus the consumption power needed for driving the phase change memory device should be significantly reduced in order for phase change memory devices to be used practically.
Second, when the crystalline state of unit cells of the phase change memory device are changed, information stored in neighboring cells should not be destroyed or changed by the electric joule heat. This is of particular significance as the distance between the memory cells in the memory cell array of the phase change memory device having high integration degree is continuously being reduced. The electric joule heat generated when a predetermined cell is operated should not be an impeding factor for the operation of neighboring cells.